SOC Design

Thursday, October 06, 2005

The Silicon Steamroller

In an October 5 article, EE Times' editor Dylan McGrath writes: "There is a widespread misconception about the current size and strength of the Chinese fabless semiconductor industry, according to Lung Chu, president of the Asia Pacific region for Cadence Design Systems Inc...

Chu said total revenue for Chinese fabless companies in 2004 was less than $1 billion and that most of the companies' designs are 0.18 micron or 0.25 micron."

So, things look pretty good still for the rest of the world, which seems to hold the high ground of advanced semiconductor design. That is, until you couple this October 4 story about IC mask making written by Richard Goering, also for EE Times. Goering writes about this year's version of an annual mask-usage study sponsored by Sematech and conducted by Shelton Consulting:

"Only 5 percent of IC photomasks are below 100 nm...according to a 'mask industry assessment' study presented at the BACUS Photomask Technology symposium... According to the study results, just under 50 percent of masks use 350 nm or greater ground rules, 12 percent are below 130 nm, 5 percent are below 100 nm and just 0.8 percent are below 70 nm. The study looked at volumes, not revenues or IC transistor counts."

Using these numbers, by my count Chinese fabless design companies can already handle well over 50%, and perhaps as much as 80%, of the designs being created today. That fraction will increase rapidly over the next few years as the design houses in China climb the design learning curve.

As a country, China has proven many times over that it can steamroller any learning curve it wishes. The only way to avoid being crushed by a steamroller is to find a way to run faster than the steamroller or find a faster vehicle to escape. It's foolish and dangerous to think that the steamroller will run out of fuel before it can reach you.


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